Make

Last Updated: 8/13/20-24

Make is a development and automation tool that uses a configuration file to step through a set of dependencies in order to execute or archive a goal. Make is widely and commonly used. Make creates or executes its instructions from a file – commonly named – Makefile. The make file is constructed by using labels and tabs indicating a command.

A makefile is simple a file that contains rules that how to build or compile a program. in reality it is more flexible and be sued for other duties, but this still doesn’t change much.

Installing:

Installing Make is a simple process. Use apt to pull the make package from a repository and install it.

apt install make

A make file may look similar to:

all:
        go build helloworld.go

In this example we have the simple target “all”. On the next line the command line or line used for evaluation actually has a tab in it.

In general

In general the Make file is composed of 3 components; the target; the dependencies and the command line(s)

target: dependencies
<tab> command

More complex uses:

While traditionally used as part of the development process to compile or build a executable, it can also be used to execute more complex tasks such as build a .deb, .rpm or create and assemble a python wheel or a java library.

The power of Make then builds from this by using variables and the labels to accomplish a task. These tasks can take on the form of our build goals – such as build, install, and uninstall

Compile All

Loosely put this can be used to compile or execute all the targets in the makefile.

make -B

Using Variables:

More complex versions can that can take advantage of variables. Typically these are used as capitalized variables like C below. Using variable like this can be a time savor. When used more complex and repetitive actions now only have to be updated at the variable definition.

Please also note we are defining a default “all” target in case make is issued with explicate target.

C = gcc

all: lab1

lab1: link.o
        $(C) -c link.c
        $(C) lab1.c -o lab1 link.o

clean:
        rm -rf *.o

and running make produces:

ubuntu@nodex:~/x$ make
cc    -c -o link.o link.c
gcc -c link.c
gcc lab1.c -o lab1 link.o

Reference:
https://en.wikipedia.org/wiki/Make_(software)#